Time Domain Reflectometry Accuracy Control for via Characterizations in High Speed Links

The time domain reflectometry (TDR) is a very popular tool for high speed link characterizations. However, its modeling and simulations for vias constantly face accuracy challenges due to vias’ small dimension and fast rise time. While many existing papers discussed discontinuity analysis of transmission lines, in this paper, we focus on the accuracy control methods in TDR modeling and analysis for vias in PCBs for high speed signal integrity (SI). There are many practical factors affecting the via impedance result in TDR, such as frequency domain simulation setups, TDR window selections, rise time, bandwidth, etc. Based on the principal analysis, we propose a practical calculation flow for a via’s TDR modeling process, and provide a TDR interpretation approach by jointly using different window functions to justify the correct locations and impedance values of the via structures. Highly oscillatory TDR responses are also discussed to guide the real TDR practice. According to our search, there is very little in literature describing similar techniques to solve a via’s TDR analysis accuracy issues. The proposed method can also be used on other small feature’s TDR analyses.